Fully Buffered DIMMs (FBDIMMs) extend memory capability New superior channel functions vastly enhance overall performance
FBDIMMs are the cost-effective, high-speed, high-density program memory remedy for servers, workstations, networking equipment, and high-end desktop computers
What is an " AMB" or Innovative Memory Buffer ?
Fully Buffered DIMMs uses an "Advanced Memory Buffer" chips that maintains signal integrity and improved error detection methods that reduce soft errors make totally buffered DIMMs an ideal method memory remedy. Using a point-to-point architecture, the superior memory buffer (AMB) transmits signals among the controller, memory devices, and other modules without sacrificing signal integrity—or velocity. Unlike modules with a parallel path (stub-bus) architecture, FBDIMMs move data serially between the AMB and memory controller.
Their simplified structure means FBDIMMs boast a lower pin count and faster transmission rates compared to conventional architectures. Plus, they can perform reads and writes simultaneously, eliminating the read-to-read delay between data transfers. With speeds up to 4.8 Gb/s, FBDIMMs enable fast buffering that optimizes server functionality.
With improved Error Detection capabilities , Entirely Buffered DIMM are build with capabilities to prevent Address/command soft errors which can disrupt server overall performance and reliability. To help lessen their occurrence,
Tiffany Online, FBDIMMs incorporate an enhanced cyclic redundancy check (CRC) that provides greater data and address/command protection than traditional server modules.
Designers can also configure it to suit their particular applications. Providing an even greater defense, the bit lane fail-over correction feature identifies bad data paths and removes them from the operation. Together, these error detection methods dramatically reduce address/command soft errors.
FB-DIMM Memory Architecture
The FB-DIMM technology direct signaling interface between the memory controller and the DRAM chips is split into two independent signaling interfaces with a buffer between them. The interface between the buffer and DRAM chips is the same as today, supporting DDR2 (DDR stands for double data rate, a type of SDRAM memory; DDR2 is the second generation) in early FB-DIMM platforms and DDR3 in the future. However, the interface between the memory controller and the buffer is changed from a shared parallel interface to a point-to-point serial interface (see the figure below).
The buffer is referred to as the AMB (superior memory buffer) and a number of suppliers, including Intel, are already making these. The AMB is designed to only take action in response to memory controller commands. The AMB is expected to deliver DRAM commands from the memory controller over the FB-DIMM interface without any alteration to the DRAM devices over the parallel DDR-based interface.
The end result is impressive scalability and throughput: FB-DIMM technology offers scalability of 192 gigabytes — 6 channels, 8 DIMMs/channel, 2 ranks/DIMM, 1 gigabyte DRAMs and offers bandwidth of 6.7 gigabytes per second (GBps) sustained data throughput per channel.
Improving Board Layouts
The FB-DIMM channel pin count is approximately 69 pins per channel, compared with about 240 pins for today's parallel channel. This results in less routing complexity and less routing area between the memory controller and DIMMs (Figures 3 and 4), thereby saving board expense to system manufacturers. For small factor systems such as 1U and blade systems, board real estate is in short supply, and the savings represented by the FB-DIMM technology transition are significant.
Reliability Now Built In
FB-DIMM technology offers better RAS (reliability, availability, serviceability) by extending the currently available ECC (error check code, a method of checking the integrity of data in DRAM) to include protection of commands and address data. Additionally, FB-DIMM technology automatically retries when an error is detected, allowing for uninterrupted operation in case of transient errors.
Built-in Headroom for the Future
Since the FB-DIMM interface is based on serial differential signaling (similar to Serial ATA, Serial SCSI, PCI Express, and others), a memory controller can support multiple generations of FB-DIMM technology-based components. Today's platforms can support backward compatibility of memory devices (for example, both DDR and DDR2), extending the choice to on-site memory replacements and increasing program flexibility for IT environments. Bottom line, with FB-DIMM systems,
Tiffany Sterling Silver, an end user could have the flexibility of using first-generation FB-DIMMs with DDR2 DRAM or second-generation FB-DIMMs with DDR3 DRAM.
Reduced Total Cost of Ownership
FB-DIMM technology delivers better TCO (total cost of ownership) to IT in a number of ways: Compatibility of FB-DIMMs across generations means that IT can extend the overall lifespan of DIMM investment through field swapping of DIMMs for new systems. Over time, IT will be able to use a newer generation of DIMMs for better efficiency or expense.
Due to headroom on ability and bandwidth and Gen-X compatibility, IT can have more flexibility to repurpose a program for compute-intensive, data-intensive, or I/O-intensive applications, thereby providing better flexibility and range in reprovisioning.
With unprecedented RAS features on memory interfaces such as CRC (cyclical redundancy check) protection on address, retry, bit lane fail-over, hot add while active,
Tiffany Diamond Earrings, and so on, IT would have fewer reasons to bring down the program, resulting in reduced down-time. Because FB-DIMM technology is transparent to OSes and applications, there are no significant barriers to adoption—or realizing—the benefits of the new technology.
Status of FB-DIMM Technology
The FB-DIMM technology standard is currently being authored within the JEDEC Solid State Technology Association industry standards body (www.jedec.org). Interested readers can contact JEDEC directly for the latest status and access to industry standard specifications.
The memory industry has announced broad support of FB-DIMM components in time for the expected launch of FB-DIMM-enabled platforms in the first half of 2006. Intel has been working closely with the industry on FB-DIMM product support plans and is also working with industry tools vendors to ensure a healthy industry ecosystem of enabling tools and programs to fuel industry development.
Intel also founded the Memory Implementers Forum,
Tiffany And Co, an industry group cosponsored by Dell, Hewlett-Packard, and IBM,
Tiffany Earings, with a mission of accelerating industry development of memory technologies such as FB-DIMM for support of Intel® architecture platforms. More information regarding this forum can be found at www.memforum.com